Shanquan Tian ☕️
Shanquan Tian

Software Engineer, ML Performance

Google

About Me

Hi, I am a software engineer at Google, specializing in machine learning performance, hardware/software co-design, and large language model (LLM) optimization.

My work focuses on optimizing LLM execution on existing platforms (GPU/TPU), advancing next-generation TPU architectures, and enhancing AI infrastructures.

Previously, I earned my Ph.D. from Yale University, where I conducted research in computer architecture and security advised by Professor Jakub Szefer.

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Interests
  • AI/ML Infrastructure
  • TPU HW/SW Co-design
  • Embodied Intelligence
Education

  • Ph.D. in Computer Engineering

    Yale University

  • M.S. in Computer Engineering

    Yale University

  • BSc in Applied Physics

    University of Science and Technology of China

Experience

  1. Software Engineer, Google

    Google
    • AI/ML Infrastructure Performance: Conducted analysis and HW/SW co-design for current and next-generation AI accelerators to enhance Google’s large-scale distributed data center, optimizing for emerging large language models (LLMs).
    • Software development for fleet reliability monitoring: Designed and implemented a system to detect and monitor silent data corruptions (SDCs) across the production fleet, improving reliability and resilience.

  2. Software Engineer Intern, Google

    Google
    • Designed and implemented the support to run Open Container Initiative (OCI) standard containers in Borg, which is Google’s cluster manager that runs almost all jobs.

  3. Software Engineer Intern, Alibaba Cloud

    Alibaba Cloud

  4. Ph.D. Student, Yale University

    Yale University
    Security of Cloud FPGAs, FPGA and hardware security, cloud infrastructures, hardware accelerator design and RTL development for ML and cryptography.
Selected Publications
Shanquan Tian, Shayan Moini, Daniel Holcomb, Russell Tessier, Jakub Szefer (2023). A Practical Remote Power Attack on Machine Learning Accelerators in Cloud FPGAs. DATE'23.
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Ilias Giechaskiel (Contributed Equally), Shanquan Tian (Contributed Equally), Jakub Szefer (2022). Cross-VM Covert-and Side-Channel Attacks in Cloud FPGAs. TRETS'22.
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Ilias Giechaskiel (Contributed Equally), Shanquan Tian (Contributed Equally), Jakub Szefer (2022). Cross-VM Information Leaks in FPGA-Accelerated Cloud Environments (Best Paper Candidate). HOST'22.
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Shanquan Tian, Shayan Moini, Adam Wolnikowski, Daniel Holcomb, Russell Tessier, Jakub Szefer (2021). Remote power attacks on the versatile tensor accelerator in multi-tenant FPGAs (Best Paper Candidate). FCCM’21.
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Wen Wang, Shanquan Tian, Bernhard Jungk, Nina Bindel, Patrick Longa, Jakub Szefer (2020). Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA. CHES'20.
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