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    • Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA
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Fingerprinting Cloud FPGA Infrastructures

Feb 1, 2020ยท
Shanquan Tian
,
Ilias Giechaskiel
,
Wenjie Xiong
,
Jakub Szefer
ยท 0 min read
PDF Cite
Type
Paper
Publication
Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Last updated on Feb 1, 2020
← Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA Sep 1, 2020
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