Shanquan Tian
  • Home
  • Experience
  • Blog
  • Papers
  • 中文 (简体)
  • Recent & Upcoming Talks
    • Example Talk
  • Posts
    • Unlocking TPU Performance with Custom MatMul Kernels using JAX Pallas
    • RSA Explained: The Simple Magic Behind Secure Communication
  • Projects
  • Backups
    • Blog
      • 🎉 Easily create your own simple yet highly customizable blog
      • 🧠 Sharpen your thinking with a second brain
      • 📈 Communicate your results effectively with the best data visualizations
      • 👩🏼‍🏫 Teach academic courses
      • ✅ Manage your projects
  • Projects
    • Pandas
    • PyTorch
    • scikit-learn
  • Experience
  • Teaching
    • Learn JavaScript
    • Learn Python
  • Publications
    • A Practical Remote Power Attack on Machine Learning Accelerators in Cloud FPGAs
    • Cross-VM Covert-and Side-Channel Attacks in Cloud FPGAs
    • Cross-VM Information Leaks in FPGA-Accelerated Cloud Environments (Best Paper Candidate)
    • Remote power attacks on the versatile tensor accelerator in multi-tenant FPGAs (Best Paper Candidate)
    • Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA
    • Fingerprinting Cloud FPGA Infrastructures

Fingerprinting Cloud FPGA Infrastructures

Feb 1, 2020·
Shanquan Tian
,
Ilias Giechaskiel
,
Wenjie Xiong
,
Jakub Szefer
· 0 min read
PDF Cite
Type
Paper
Publication
Proceedings of the 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
Last updated on Feb 1, 2020
← Parameterized Hardware Accelerators for Lattice-Based Cryptography and Their Application to the HW/SW Co-Design of qTESLA Sep 1, 2020
Languages:
English
中文 (简体)

© 2025 Shanquan Tian. This work is licensed under CC BY NC ND 4.0

Published with Hugo Blox Builder — the free, open source website builder that empowers creators.